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The Computer Journal 1972 15(3):238-246; doi:10.1093/comjnl/15.3.238
© 1972 by British Computer Society
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A realistic approach to detection test set generation for combinational logic circuits

R. G. Bennetts *

Department of Electronics, University of Southampton, Southampton, UK

The paper presents a technique for deriving a detection test set for combinational logic circuits, that is based on the exclusive-OR operator. It is claimed that the procedure is suitable for implementation on a digital computer and this is supported by results relating to single-/multi-output circuits using either basic gates or MSI/LSI logic elements.

Received January 1972.

* Department of Electronics, University of Southampton, Southampton SO9 5NH


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