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The Computer Journal 1974 17(1):64-68; doi:10.1093/comjnl/17.1.64
© 1974 by British Computer Society
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Analysis of sequential logic circuits

D. Pai1 * and D. Lewin2 §

1 Burrough Machines Ltd., formerly Department of Electronics, Southampton University, Southampton, UK, 2 Department of Electrical Engineering and Electronics, Brunel University, Kingston Lane, Uxbridge, Middlesex, UK

In the analysis and simulation of sequential circuits, and in particular asynchronous sequential circuits, the automatic location of feedback loops within the network often presents serious problems.

This paper presents an algorithm, based on an analytical approach, which will isolate the true feedback loops in a network, that is those paths which correspond to the actual secondary variables of the circuit.

Received January 1973.

* Burrough Machines Ltd., formerly Department of Electronics, Southampton University.

§ Department of Electrical Engineering and Electronics, Brunel University, Kingston Lane, Uxbridge, Middlesex.


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