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The Computer Journal 1977 20(1):68-72; doi:10.1093/comjnl/20.1.68
© 1977 by British Computer Society
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The cellular logic array image processor

M. J. B. Duff * and D. M. Watson *

Department of Physics and Astronomy, University College London, Gower Street, London, UK

Image processing and pattern recognition are tasks which are proving surprisingly resistant to automation. The majority of pattern recognition problems have still to be formulated in a manner sufficiently precise to allow effective programs to be written, whilst conventional approaches would seem to lead to a requirement for almost infinite processing times and storage area.

Conventional serial digital computers are not well matched to the processes involved in pattern recognition. A processor composed of an array of logic elements interconnected with nearest neighbours and processing in parallel is better matched and can operate at greater speed.

In order to explore fully the problems which are likely to be encountered in the use of parallel processing cellular logic arrays, several have been constructed and operated, the most recent of which, CLIP 3, is described.

Received November 1974.

* Department of Physics and Astronomy, University College London, Gower Street, London, WC1E 6BT


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