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The Computer Journal 1980 23(2):165-185; doi:10.1093/comjnl/23.2.165
© 1980 by British Computer Society
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Saving of NAND/NOR gates by inhibition or d-inhibition

M. Rabel1 *, D. Dubus2 and A. Tosser2

1 Gixi Informatique Avenue de la Baltique 91403, Orsay, France, 2 Universite de Nancy 1, Laboratoire d'Electronqiue Co 140-54037, Nancy, France

Inhibition is a process which consists of taking in the Karnaugh map of a logic function a loop of ones including a few bothersome zeros and intersecting it with the complement of the looping of these zeros. Similarly, dual inhibition (d-inhibition) is associated with the dual form of a sum of products. Typical properties of inhibition are then used to calculate the saving of gates which is obtained by carrying out (d)-inhibition in disjunctive (conjunctive) expressions of Boolean functions.

Received October 1977.

* With Gixi Informatique Avenue de la Baltique, Orsay, France

§ Universite de Nancy 1, Laboratoire d'Electronqiue Co 140-54037, Nancy Cedex, France


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