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The Computer Journal 1981 24(4):343-346; doi:10.1093/comjnl/24.4.343
© 1981 by British Computer Society
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Performances of two microprocessor-based multiplexor techniques

A. D. Elliman1 * and A. R. Sudhindra2 §

1 Milfield, Cheapside Lane, Denham, UK, 2 Centre for Science Education, Chelsea College, London, UK

In many instances where a group of terminals is connected to a remote mainframe, the actual utilisation of the terminals falls below 100%, even during peak periods. This paper examines the performance of multiplexing techniques which make use of this shortfall to increase the effective carrying capacity of the high speed link. The techniques are specifically intended for implementation using microprocessors. Two methods of asynchronous time division multiplexing are considered. The ‘bit map’ technique gives useful improvements in carrying capacity for terminal utilisations between 12 and 50%, even when noisy lines are in use. At lower utilisation, the ‘address code’ technique is superior.

Received January 1980.

* Address for correspondance; Milfield, Cheapside Lane, Denham UB9 5AD, UK.

§ Centre for Science Education, Chelsea College, London SW6 4HR, UK.

Department of Computer Science, Brunel University, Uxbridge UB8 3PH, UK


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