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The Computer Journal 1986 29(1):12-16; doi:10.1093/comjnl/29.1.12
© 1986 by British Computer Society
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Parity Check Codes for Logic Processors

R. K. Ward *

Department of Electrical Engineering, University of British Columbia, Vancouver, B.C. V6T 1W5, Canada

Parity check codes, applicable for error control for all bit-wise logical operations, are presented. These codes could be used for protecting information against errors in logic processors as well as protecting it during storage and transmission. They are useful for those cases when the Reed–Muller codes are not applicable and when the word lengths are not too large. Encoding and decoding of these codes are very simple.

Received July 1984.

* Department of Electrical Engineering, University of British Columbia, Vancouver, B.C. V6T 1W5, Canada


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