© 1987 by British Computer Society
On a Novel Self-test Approach to Digital Testing
1 Department of Electrical Engineering, Michigan State University, East Lansing, MI 48824, USA, 2 Department of Electrical and Computer Engineering, University of Colorado, Campus Box 425 Boulder, CO 80309, USA
In this paper, a new approach to digital testing is presented. This is based on a dynamical modelling technique for the system under test (SUT). The proposed technique consists of an iterative self-test approach, that has been proved to be applicable to analogue fault analysis. A Discrete Component Connection Model (DCCM) is presented as a basis of modelling analysis. The DCCM describes a digital system by using a large-scale dynamic model for a reduction in computation. In this model, difference connection and component equations are simultaneously solved. Fault identification is accomplished by generating a pseudo-system partition of the SUT; a decision process is then executed to validate test results. The decision process is based on a novel Boolean technique for verification of results using a fault bound. This approach is applicable to testing of both sequential and combinatorial logic. Complexity of this testing technique is analysed; a reduction of complexity is accomplished by using covering set theory. Algorithms are presented for both the self-test and the decision processes.
The benefits of this approach are computational compatibility to existing complex simulation packages and lower order of complexity of the decision process for single and multiple fault detection and location. Illustrative examples are presented.
Received January 1986. revised April 1986.
* Supported in part by the Division of Engineering Research, Michigan State University, East Lansing, MI 48824.
To whom correspondence should be addressed. Supported in part by a grant from AT&T and by the Engineering Foundation's Research Initiation Grant.
¶ Department of Electrical Engineering, Michigan State University, East Lansing, MI 48824, USA
Department of Electrical and Computer Engineering, University of Colorado, Campus Box 425 Boulder, CO 80309, USA