© 1989 by British Computer Society
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The Parallel Interpretation of Logic Programs in Distributed Architectures

1 Istituto di Elettronica e Telecomunicazioni, Facolta di Ingegneria, Universita degli Studi di Pisa, Via Diotisalva 2, 56100 Pisa, Italy, 2 I.D.S. Ingegniera Dei Sistemi S.p.A., Pisa, Italy
Multiple processor architectures can be used to speed up the execution of logic programs, as they allow the exploitation of appropriate forms of ORAND parallelism. In this paper we refer to distributed systems in which nodes are connected by means of point-to-point links, and information exchanges between processes are accomplished by message passing alone. The number of nodes is supposed to be not too large, and the memory of each node not sufficient to store all the database. A parallel interpreter for logic programs is proposed in which the parallelism exploited is not the maximum one and consists of the classical OR parallelism paired with an appropriate form of AND parallelism (backtracking parallelism). The solutions are evaluated in the same order as a classical sequential depth-first interpreter.
Received February 1986. revised May 1987.
* Istituto di Elettronica e Telecomunicazioni, Facoltà di Ingegneria, Università degli Studi di Pisa, Via Diotisalva 2, 56100 Pisa, Italy
I.D.S. Ingegneria Dei Sistemi S.p.A., Pisa