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The Computer Journal 1991 34(3):195-206; doi:10.1093/comjnl/34.3.195
© 1991 by British Computer Society
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HIDEL: A Language for Hierarchical VLSI Design

M. Ancona1 *, A. Clematis2 §, L. De Floriani1 * and E. Puppo2 §

1 Dipartimento di Matematica, Universita di Genova, Via L.B. Alberti 4, 16132 Genova, Italy, 2 Istituto per la Matematica Applicata, Consiglio Nazionale dell Ricerche, Via L.B. Alberti 4, 16132 Genova, Italy

HIDEL (HIerarchical DEscription Language) is a new language for structural description of hardware systems. The use of HIDEL allows a modular and hierarchical description of a hardware system. HIDEL can be integrated with a data model, called the Hierarchical Hypergraph with Ports (HHP), which provides a graph-based description of a VLSI object at different levels of specification. The possibility of extending the HIDEL-HHP environment with functional description for simulation is also investigated.

Received August 1989. revised February 1990.

* Dipartimento di Matematica, Universita di Genova, Via L. B. Alberti 4, 16132 Genova, Italy,

§ Istituto per la Matematica Applicata, Consiglio Nazionale dell Ricerche, Via L. B. Alberti 4, 16132 Genova, Italy


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