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The Computer Journal 1993 36(8):756-762; doi:10.1093/comjnl/36.8.756
© 1993 by British Computer Society
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On the Physical Design of PRAMs*

F. Abolhassan1 §, R. Drefenstedt1 §, J. Keller2 ¶, W. J. Paul1 § and D. Scheerer1 §

1 Universitat des Saarlandes, Computer Science Department, Postfach 1150, 66041 Saarbrucken, Germany, 2 CWI, Dept. AA, Postbus 94079, 1090 GB Amsterdam, The Netherlands

The Saarbrücken Parallel Random Access Machine (SB-PRAM) is a scalable shared memory machine. At the gate level it is a re-engineered version of the Fluent machine [A. G. Ranade, S. N. Bhatt and S. L. Johnson. The Fluent Abstract Machine. In Proc. 5th MIT Conference on Advanced Research in VLSI, pp. 71–93 (1988)]. It uses hashing of addresses, combining and latency hiding. A prototype with 128 processors is presently being designed. In this paper we deal with several problems related to the physical design of this machine such as the total number of network chips, the geometrical arrangement of boards in the network and the VLSI realization of certain sorting arrays. We also present an extremely fast method to rehash addresses without use of external memory.

Received May 1993. revised September 1993.

* Research was partially supported by DFG (SFB 124) and Siemens AG. A preliminary version of this paper appeared in [1].

§ Universität des Saarlandes, Computer Science Department, Postfach 1150, 66041 Saarbrücken, Germany

CWI, Dept. AA, Postbus 94079, 1090 GB Amsterdam, The Netherlands


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