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The Computer Journal 1996 39(4):346-352; doi:10.1093/comjnl/39.4.346
© 1996 by British Computer Society
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Bandwidth Analysis for A Class of Bus-Based Systems

H.-J. Wang1 and J. Li2 *

1 Department of Computer Science and Engineering, NanJing University of Science and Technology, NanJing 210094; China, 2 SiWei Computer Corporation, No. 448 ZhuJiang Road, NanJing 210018, China

Bus-based systems are very attractive because they are simple and easy to use. This paper addresses the performance analysis of (N x N x B) prioritized bus-based multiprocessor systems. The interconnection networks considered include the complete multiple bus networks, the partial multiple bus networks and the partial multiple bus networks with K classes. The effective memory bandwidth is chosen as the performance measure. The proposed analytical models are derived under the assumption that a processor has a favourite memory module. The simulation experiments are performed. It can be shown that the results from theory models are very close to those from simulations.

Received September 20, 1994. revised April 20, 1996.

* SiWei Computer Corporation, No. 448 ZhuJiang Road, NanJing 210018, P.R. China

§ Department of Computer Science and Engineering, NanJing University of Science and Technology, NanJing 210094; P.R. China


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