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The Computer Journal 1987 30(1):77-79; doi:10.1093/comjnl/30.1.77
© 1987 by British Computer Society
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A Fast-Carry Adder with CMOS Transmission Gates

P. M. Fenwick *

Department of Computer Science, The University of Auckland, Private Bag, Auckland, New Zealand

A parallel adder due to Kilburn uses a carry path with cascaded switches instead of more conventional logic gates. It is shown that a similar adder using CMOS transmission gates in the carry path combines high performance with a simple and economical design which should be suitable for integration.

Received January 1986.

* Department of Computer Science, The University of Auckland, Private Bag, Auckland, New Zealand


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