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The Computer Journal 1990 33(5):473-475; doi:10.1093/comjnl/33.5.473
© 1990 by British Computer Society
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Short note

VLSI Binary-Residue Converters for Pipelined Processing

G. Alia1 and E. Martinelli2 * §

1 Istituto di Elettronica e Telecomunicazioni - Facolta di Ingegneria dell'Universita di Pisa, Via Diotisalvi, 56100 Pisa, Italy, 2 Istituto di Elaborazione dell'Informatizione del C.N.R., Via S. Maria, 46, 56100 Pisa, Italy

Residue Number Systems (RNS) are suited for high-speed applications and VLSI implementations, because of the modular and parallel nature of their arithmetic. In this paper a new solution is provided to the problem of designing VLSI structures for converting integers to and from residue number systems in the area of pipelined applications, with the constraint that the layout width is comparable with the data stream width. The proposed structure is suited for both direct and reverse conversion and has complexity figures better than previously known results, evaluated under several hypotheses on the RNS parameters.

Received March 1989. revised October 1989.

* Istituto di Elaborazione dell'Informatizione del C.N.R., Via S. Maria, 46, 56100 Pisa, Italy

§ To whom correspondence should be addressed.

Istituto di Elettronica e Telecomunicazioni – Facoltà di Ingegneria dell'Università di Pisa, Via Diotisalvi, 56100 Pisa, Italy.


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